The inventive concepts described herein generally relate to data storage devices, and to user devices including data storage devices.
Data storage devices are utilized in a wide variety of applications, referred to broadly herein as “user devices.” Examples of data storage devices include solid state drives (SSD), hard disc drives (HDD) memory cards, USB memories, and so on. Examples of user devices include personal computers, digital cameras, camcorders, cellular phones, MP3 players, portable multimedia players (PMP), personal digital assistants (PDA), and so on.
User systems typically include a host device (CPU, main memory, etc.) and a data storage device. The storage device may or may not be portable and detachable from the host device, and may include non-volatile memory and/or volatile memory. Examples of volatile memory include DRAM and SRAM, and examples of nonvolatile memory EEPROM, FRAM, PRAM, MRAM and flash memory.
Conventional memory systems such as hard disks and floppy disk drives are not as rugged or power efficient as flash memory because they have moving parts that can be easily damaged. As a result, some conventional computer systems are replacing hard disk drives and floppy drives with solid state drives (SSD).
Replacing a conventional disk drive with an SSD is not entirely straightforward. One reason is because data stored in a conventional disk drive can be overwritten in its current location, but data stored in a flash memory, for example, of the SSD cannot be overwritten without first erasing an entire block of data. In other words, conventional disk drives have “write in place” capability, whereas flash memory does not. As a result, when a flash memory is required to coordinate with a host system that uses the memory access conventions of a conventional disk drive, the flash memory typically uses a flash translation layer (FTL), which is a driver that reconciles a logical address space used by the operating system with a physical address space used by the flash memory.
The flash translation layer generally performs at least three functions. First, it divides the flash memory into pages that can be accessed by the host system. Second, it manages data stored in the flash memory so that the flash memory appears to have write in place capability, when in reality, new data is written to erased locations of the flash memory. Finally, the flash translation layer manages the flash memory so that erased locations are available for storing new data.
Managing the flash memory involves various operations. For example, whenever a logical address is overwritten, a page of data stored at a corresponding physical address is invalidated and new page of data is stored at a new physical address of the flash memory. Whenever a sufficient number of pages in the flash memory are invalidated, the FTL performs a “merge” operation whereby “valid” pages are transferred from source blocks containing invalid pages to destination blocks with available space. The purpose of the merge operation is to free up memory space occupied by invalidated blocks by erasing the source blocks.
The flash memory comprises a plurality memory cells arranged in a memory cell array. The memory cell array is divided into a plurality of blocks, and each of the blocks is divided into a plurality of pages. The flash memory can be erased a block at a time, and it can be programmed or read a page at a time. However, once programmed, a page must be erased before it can be programmed again.
Within a flash memory, each block is designated by a physical block address, or “physical block number” (PBN) and each page is designated by a physical page address, or “physical page number” (PPN). However, the host system accesses each block by a logical block address, or “logical block number” (LBN) and each page by a logical page address, or “logical page number” (LPN). Accordingly, to coordinate the host system with the flash memory, the FTL maintains a mapping between the logical block and page addresses and corresponding physical block and page addresses. Then, when the host system sends a logical block and page address to the flash memory, the FTL translates the logical block and page address into a physical block and page address.
One problem with conventional merge operations is that the host system can not determine when a merge operation occurs, since merge operations are determined by operations of the FTL which are transparent to the host system. Since FTL does not store information about a file system, such as a file allocation table, the FTL can not determine whether the host system considers a page invalid. Accordingly, in some instances, a file system for the host system may mark certain pages for deletion without the awareness of the FTL. As a result, a merge operation performed by the FTL may copy pages that are invalid from the host system's point of view. As a result, the merge operation takes more time than it should, thus degrading the performance of the memory system.
According to one of many aspects of the inventive concepts, a storage device is provided which includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory is configured to temporarily store the storage data received by the host interface. The controller is configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to receipt of the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity, and to execute an invalidation process when the memory capacity of the invalid data is less than the reference capacity. The logging process includes logging a location of the invalid data, and the invalidation process includes invalidating the invalid data.
According to another of many aspects of the inventive concepts, a memory system is provided which includes a host device and a storage device. The host device includes a processor and a main memory, and is configured to transmit storage data and to transmit an Invalidity Command, where the invalidation command is indicative of invalid data among transmitted storage data. The storage device is operatively connected to the host device, and includes a buffer memory configured to temporarily store the storage data transmitted by the host, a storage medium, and a controller configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity, and to execute an invalidation process when the memory capacity of the invalid data is less than the reference capacity. The logging process includes logging a location of the invalid data, and the invalidation process comprises invalidating the invalid data.
According to yet another of many aspects of the inventive concepts, a method of controlling a storage device is provided, where the storage device includes a host interface, a buffer memory, a storage medium, and a controller. The method includes receiving storage data and an invalidation command via the host interface, where the invalidation command is indicative of invalid data among storage data received by the host interface. The method further includes temporarily storing the storage data in the buffer memory, executing a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium, executing a logging process in response to the invalidation command when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity, and executing an invalidation process in response to the invalidation command when the memory capacity of the invalid data is less than the reference capacity. The logging process includes logging a location of the invalid data, and the invalidation process includes invalidating the invalid data.